1. Field of the Invention
The invention relates to a semiconductor process, and more particularly to a method for preventing formation of photoresist scum in order to improve etching profile and prevent clogging of via holes, thus improving subsequent metallization.
2. Description of the Related Art
In current semiconductor integrated circuit method, the photolithography technique is a very critical procedure, in which accurate transfer of the circuit design to the semiconductor substrate determines the product properties. Generally, photolithography technique includes coating, exposure, development, and photoresist stripping. In recent years, with continuous miniaturization in device size, photolithography techniques require improvement and play an even more critical role in device quality, yield, and cost.
In the dual damascene photolithography method, nitrogen (N) reacts with and contaminates the photoresist. Thus, during the development procedure, amine (NHx) photoresist scum remains, in turn forming an inaccurate pattern and seriously affecting the electrical properties of the device. The nitrogen source is derived from silicon oxynitride (SiON) material of the anti-reflective layer (ARL) and the silicon nitride or silicon carbon nitride (SiCN) material of the etching stop layer. In order to further understand the background of the present invention, the conventional method for forming a dual damascene structure is explained accompanied by FIGS. 1a to 1e. 
First, in FIG. 1a, an etching stop layer 102 such as silicon nitride or silicon carbon nitride, a dielectric layer 104, an anti-reflective layer 106 such as silicon oxynitride, and a photoresist layer 108 are formed in sequence on a substrate 100.
Subsequently, in FIG. 1b, a photoresist pattern layer 108a is formed using exposure and wet development. Since the photoresist layer 108 is contaminated by nitrogen, the photochemical reaction is not complete during exposure. Thus, during wet development, photoresist scum 108b remains on the sidewalls of the photoresist pattern layer 108a. Therefore, when etching is performed to form a via hole 104a, the etching profile is inferior and the critical dimension (CD) is changed as shown in FIG. 1c, seriously effecting the electrical properties of the device.
Subsequently, in FIG. 1d, after the photoresist pattern layer 108a is removed, a photoresist layer 110 is formed on the anti-reflective layer 106 and in the via hole 104a. 
Finally, in FIG. 1e, a photoresist pattern layer 110a is formed on the anti-reflective layer 106 by exposure and development. Next, etching is performed to form a trench 104b over the via hole 104a, making up a dual damascene structure. In the same way, due to nitrogen contamination during the exposure and development methods, photoresist scum 110b clogs the via hole 104a. Photoresist scum 110b, detrimental to subsequent metallization and causing device failure, and is very difficult to remove even by photoresist stripping.
In order to solve the above-mentioned problem, plasma descumming with oxygen plasma is performed on photoresist pattern layers suffering formation of photoresist scum. However, after plasma descumming, the photoresist pattern layer thins and has decreased etching resistance. Also, the resulting pattern will be larger than the original design, which in turn changes the electrical properties of the device and does not meet the original device requirements.
In addition, some researchers have developed special photoresists or developers to prevent formation of photoresist scum. Although the photoresist scum problem is solved, the production cost increases.